A Novel Methodology for Reducing the Power Supply Voltage Drop at the Core of Ic’s Chips

This paper proposed an efficient reduction method of voltage drop (IR) at the core of high density IC’s chips. The presented method is based on branching out several layer of metals from the I/O bond-pads of power supply and feed them to the core of the chip through a data and other non power supply pads. Hence, the up most two layers of metals (M6, M7) for seven layers of metals technology are pass through all I/O bond-pads forming a ring structure. Furthermore, M6 and M7 are stripped through the data and control I/O pads with ground and high voltage connection to the core of the chip. Thus, increases the current density area of power supply through an increase of metal area without adding an additional count of power supply I/O pads.